Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions

• Дата: 2026
• Автори: Belhadj Mostefa, M. M., Boussaid, A., Khezzar, A.
• Формат: Стаття
• Мова: Англійська
• Опубліковано: National Technical University "Kharkiv Polytechnic Institute" and Аnatolii Pidhornyi Institute of Power Machines and Systems of NAS of Ukraine 2026
• Теми: shunt active power filter; harmonic compensation; adaptive filtering; non-ideal grid; power quality
• Онлайн доступ: https://eie.khpi.edu.ua/article/view/353265
• Назва журналу: Electrical Engineering & Electromechanics

Introduction. The widespread adoption of power-electronic loads has made harmonic distortion a critical power-quality issue. shunt active power filters (SAPFs) remain the most versatile solution. Problem. The conventional harmonic compensation algorithms suffer from degraded filtering performance under non-ideal grid condition, while the conventional low-pass filters (LPFs) in instantaneous reactive power theory (p-q theory) create an unavoidable trade-off between transient speed and harmonic rejection. Goal. To develop an adaptive and efficient harmonic current compensation algorithm that can generate reference currents with rapid convergence and high accuracy under non-ideal grid conditions. Methodology. The proposed method combines a multivariable filter phase-locked loop (MVF-PLL) for precise extraction of instantaneous components normalized to unit amplitude (i.e., sinq, cosq) with a variable leaky least mean squares (VLLMS) adaptive filter for DC component extraction. The algorithm was tested in MATLAB/Simulink across five scenarios, including balanced and unbalanced voltages, variable loads, and voltage distortions. Experimental validation was conducted on a field-programmable gate array (FPGA) using real-time co-simulation and hardware implementation. Results. MATLAB/Simulink simulations and real-time FPGA implementation on a low-cost Spartan-6 board show that the proposed method reduces the 2–98 % rise time of the extracted DC active power from ≈ 12 ms (4th-order Butterworth LPF) to 0.6– 0.8 ms (93–95 % improvement) while maintaining source current total harmonic distortion below 4.92 % in the worst case fully compliant with IEEE 519. The extremely low computational cost makes the solution ideal for industrial controllers. Scientific novelty. This paper proposes a novel control strategy that replaces the traditional LPF with a single-coefficient VLLMS adaptive filter while ensuring robust positive-sequence synchronisation via an MVF-PLL. Practical value. The algorithm improves SAPF performance, reduces response time, and ensures stable operation across diverse grid scenarios, offering a reliable solution for industrial applications. References 24, tables 2, figures 15.