Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions
Introduction. The widespread adoption of power-electronic loads has made harmonic distortion a critical power-quality issue. shunt active power filters (SAPFs) remain the most versatile solution. Problem. The conventional harmonic compensation algorithms suffer from degraded filtering performance un...
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National Technical University "Kharkiv Polytechnic Institute" and Аnatolii Pidhornyi Institute of Power Machines and Systems of NAS of Ukraine
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Electrical Engineering & Electromechanics| _version_ | 1869562799232909312 |
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| author | Belhadj Mostefa, M. M. Boussaid, A. Khezzar, A. |
| author_facet | Belhadj Mostefa, M. M. Boussaid, A. Khezzar, A. |
| author_institution_txt_mv | [
{
"author": "M. M. Belhadj Mostefa",
"institution": "University Freres Mentouri Constantine 1"
},
{
"author": "A. Boussaid",
"institution": "University Freres Mentouri Constantine 1"
},
{
"author": "A. Khezzar",
"institution": "University Freres Mentouri Constantine 1"
}
] |
| author_sort | Belhadj Mostefa, M. M. |
| baseUrl_str | http://eie.khpi.edu.ua/oai |
| collection | OJS |
| datestamp_date | 2026-07-01T21:42:56Z |
| description | Introduction. The widespread adoption of power-electronic loads has made harmonic distortion a critical power-quality issue. shunt active power filters (SAPFs) remain the most versatile solution. Problem. The conventional harmonic compensation algorithms suffer from degraded filtering performance under non-ideal grid condition, while the conventional low-pass filters (LPFs) in instantaneous reactive power theory (p-q theory) create an unavoidable trade-off between transient speed and harmonic rejection. Goal. To develop an adaptive and efficient harmonic current compensation algorithm that can generate reference currents with rapid convergence and high accuracy under non-ideal grid conditions. Methodology. The proposed method combines a multivariable filter phase-locked loop (MVF-PLL) for precise extraction of instantaneous components normalized to unit amplitude (i.e., sinq, cosq) with a variable leaky least mean squares (VLLMS) adaptive filter for DC component extraction. The algorithm was tested in MATLAB/Simulink across five scenarios, including balanced and unbalanced voltages, variable loads, and voltage distortions. Experimental validation was conducted on a field-programmable gate array (FPGA) using real-time co-simulation and hardware implementation. Results. MATLAB/Simulink simulations and real-time FPGA implementation on a low-cost Spartan-6 board show that the proposed method reduces the 2–98 % rise time of the extracted DC active power from ≈ 12 ms (4th-order Butterworth LPF) to 0.6– 0.8 ms (93–95 % improvement) while maintaining source current total harmonic distortion below 4.92 % in the worst case fully compliant with IEEE 519. The extremely low computational cost makes the solution ideal for industrial controllers. Scientific novelty. This paper proposes a novel control strategy that replaces the traditional LPF with a single-coefficient VLLMS adaptive filter while ensuring robust positive-sequence synchronisation via an MVF-PLL. Practical value. The algorithm improves SAPF performance, reduces response time, and ensures stable operation across diverse grid scenarios, offering a reliable solution for industrial applications. References 24, tables 2, figures 15. |
| doi_str_mv | 10.20998/2074-272X.2026.4.06 |
| first_indexed | 2026-07-02T01:00:24Z |
| format | Article |
| fulltext |
Industrial Electronics
40 Electrical Engineering & Electromechanics, 2026, no. 4
© M.M. Belhadj Mostefa, A. Boussaid, A. Khezzar
UDC 621.314 https://doi.org/10.20998/2074-272X.2026.4.06
M.M. Belhadj Mostefa, A. Boussaid, A. Khezzar
Shunt active power filter with variable leaky least mean squares and multivariable filter
phase-locked loop for fast harmonic compensation under non-ideal grid conditions
Introduction. The widespread adoption of power-electronic loads has made harmonic distortion a critical power-quality issue. shunt active
power filters (SAPFs) remain the most versatile solution. Problem. The conventional harmonic compensation algorithms suffer from
degraded filtering performance under non-ideal grid condition, while the conventional low-pass filters (LPFs) in instantaneous reactive
power theory (p-q theory) create an unavoidable trade-off between transient speed and harmonic rejection. Goal. To develop an adaptive
and efficient harmonic current compensation algorithm that can generate reference currents with rapid convergence and high accuracy
under non-ideal grid conditions. Methodology. The proposed method combines a multivariable filter phase-locked loop (MVF-PLL) for
precise extraction of instantaneous components normalized to unit amplitude (i.e., sin, cos) with a variable leaky least mean squares
(VLLMS) adaptive filter for DC component extraction. The algorithm was tested in MATLAB/Simulink across five scenarios, including
balanced and unbalanced voltages, variable loads, and voltage distortions. Experimental validation was conducted on a field-programmable
gate array (FPGA) using real-time co-simulation and hardware implementation. Results. MATLAB/Simulink simulations and real-time
FPGA implementation on a low-cost Spartan-6 board show that the proposed method reduces the 2–98 % rise time of the extracted DC
active power from ≈ 12 ms (4th-order Butterworth LPF) to 0.6– 0.8 ms (93–95 % improvement) while maintaining source current total
harmonic distortion below 4.92 % in the worst case fully compliant with IEEE 519. The extremely low computational cost makes the solution
ideal for industrial controllers. Scientific novelty. This paper proposes a novel control strategy that replaces the traditional LPF with a
single-coefficient VLLMS adaptive filter while ensuring robust positive-sequence synchronisation via an MVF-PLL. Practical value. The
algorithm improves SAPF performance, reduces response time, and ensures stable operation across diverse grid scenarios, offering a
reliable solution for industrial applications. References 24, tables 2, figures 15.
Key words: shunt active power filter, harmonic compensation, adaptive filtering, non-ideal grid, power quality.
Вступ. Широке впровадження силових електронних навантажень зумовило перетворення гармонічних спотворень на одну з
ключових проблем якості електроенергії. Шунтуючі активні силові фільтри (SAPFs) залишаються найбільш універсальним
засобом її розв’язання. Проблема. Традиційні алгоритми компенсації гармонік характеризуються погіршенням ефективності
фільтрації за неідеальних умов електричної мережі, тоді як класичні фільтри низьких частот (LPF), що застосовуються в
теорії миттєвої реактивної потужності (p-q теорії), створюють компроміс між швидкодією перехідного процесу та ступенем
пригнічення гармонік. Мета. Розроблення адаптивного та ефективного алгоритму компенсації гармонічних струмів, здатного
формувати опорні струми з високою точністю та швидкою збіжністю за неідеальних умов мережі. Методика. Запропонований
метод поєднує контур фазового автопідлаштування частоти на основі багатозмінного фільтра (MVF-PLL) для точного
виділення миттєвих компонент, нормованих до одиничної амплітуди (sinθ, cosθ), з адаптивним фільтром Variable Leaky Least
Mean Squares (VLLMS) для виділення постійної складової. Алгоритм досліджено в MATLAB/Simulink у п’яти режимах роботи,
зокрема за симетричних та несиметричних напруг, змінного навантаження та спотворень напруги. Експериментальну перевірку
виконано на програмованій вентильній матриці (FPGA) із використанням співмоделювання в реальному часі та апаратної
реалізації. Результати. Моделювання в MATLAB/Simulink та реалізація в реальному часі на недорогій платі Spartan-6 FPGA
показали, що запропонований метод зменшує час наростання (2–98 %) виділеної постійної складової активної потужності
приблизно з 12 мс (LPF Баттерворта 4-го порядку) до 0,6–0,8 мс (покращення на 93–95 %) при одночасному забезпеченні
коефіцієнта гармонічних спотворень струму мережі нижче 4,92 % у найгіршому випадку, що повністю відповідає вимогам
стандарту IEEE 519. Надзвичайно низька обчислювальна складність робить запропоноване рішення придатним для промислових
контролерів. Наукова новизна. У роботі запропоновано нову стратегію керування, у якій традиційний LPF замінено
однокоефіцієнтним адаптивним фільтром VLLMS із забезпеченням робастної синхронізації за додатною послідовністю за
допомогою MVF-PLL. Практична значимість. Запропонований алгоритм підвищує ефективність роботи SAPF, зменшує час
реакції та забезпечує стабільне функціонування в різних режимах електричної мережі, що робить його надійним рішенням для
промислових застосувань. Бібл. 24, табл. 2, рис. 15.
Ключові слова: шунтуючий активний фільтр потужності, компенсація гармонік, адаптивна фільтрація, неідеальна
електромережа, якість електроенергії.
Introduction. The ever-increasing penetration of
power-electronic-based loads has made harmonic
distortion one of the most critical power-quality issues in
modern distribution networks [1–3]. Shunt active power
filters (SAPFs) remain the most widely adopted and
versatile solution for compensating harmonic currents
generated by nonlinear loads [4–6].
Conventional SAPF control strategies based on
instantaneous reactive power p-q theory [7–9] or synchronous
reference frame methods [10–12] require accurate extraction
of the DC component of the instantaneous active power )( p .
This task is traditionally performed using fixed low-pass
filters (LPFs), typically 4th-order Butterworth filters with
20–40 Hz cutoff frequency. However, the inherent
bandwidth-speed trade-off of such filters results in slow
transient response (10–20 ms settling time), which is
unacceptable for fast-varying industrial loads [10].
Advanced phase-locked loop (PLL) techniques, such
as the decoupled double synchronous reference frame
PLL [13, 14], double second order generalized integrator
PLL [15–17], and especially the multivariable filter PLL
(MVF-PLL) [18, 19] have successfully solved the
synchronization problem under unbalanced and distorted
grid conditions. Similarly, several adaptive filtering
algorithms, including recursive least squares, Kalman
filters and variable-step least mean square have been
proposed for undesired component extraction and signal
component estimation, including the extraction of the DC
component of the instantaneous active power, but at the
cost of significantly higher computational complexity and
difficult parameter tuning [20–24].
The variable leaky least mean square (VLLMS)
algorithm offers an outstanding compromise, it guarantees
stability, provides extremely fast convergence [20–23], and
requires negligible computational effort when configured
with a single coefficient to extract only a DC value [24].
Although VLLMS has already shown excellent
Electrical Engineering & Electromechanics, 2026, no. 4 41
performance under ideal balanced grid conditions [22], its
behavior under simultaneous voltage unbalance, harmonic
distortion, and sudden load changes particularly when
combined with robust positive-sequence synchronization
has not yet been investigated in the literature.
This paper fills this gap by proposing a novel SAPF
control architecture that integrates a MVF-PLL for accurate
extraction of positive-sequence components even under
severe grid disturbances [18, 19], and a single-coefficient
VLLMS (VLLMS with x(k) = 1) that completely replaces
the conventional LPF for ultra-fast and stable extraction of
the DC component of active power [24].
The goal of the paper is to develop an adaptive and
efficient harmonic current compensation algorithm that
can generate reference currents with rapid convergence
and high accuracy under non-ideal grid conditions.
The main contributions of this work are:
The first reported integration of MVF-PLL and
single-coefficient VLLMS in a p-q theory-based SAPF,
fully eliminating the classic LPF bandwidth-speed trade-
off under non-ideal grid conditions.
Rigorous performance evaluation under extreme
scenarios: balanced/unbalanced/distorted grids and
sudden load variations.
Comprehensive quantitative comparison with
conventional Butterworth LPF, VLLMS algorithms in terms
of transient response, total harmonic distortion (THD).
Fixed-point real-time implementation on a low-cost
Xilinx Spartan-6 field-programmable gate array (FPGA)
with complete resource utilization report.
System description and conventional p-q theory
control. Figure 1 illustrates the test system. A balanced
3-phase 400 V (line-to-line), 50 Hz supply feeds a 6-pulse
diode rectifier, initially operating with a load resistor of
RL = 40 . At t = 0.1 s, an additional resistor is connected in
parallel to produce a sudden load increase. The SAPF is
based on a conventional 2-level voltage-source inverter rated
at 2.5 kVA, interfaced with the point of common coupling
through inductors Lf = 2 mH. The DC-link voltage is
regulated at 250 V using a 1100 µF capacitor, controlled by
PI regulator. The inverter operates with a switching
frequency of 10 kHz.
The classical p-q theory control transforms grid
voltages and load currents into the stationary reference
frame using the power-invariant Clarke transformation:
c
b
a
v
v
v
v
v
2
3
2
3
0
2
1
2
1
1
3
2
; (1)
c
b
a
i
i
i
i
i
2
3
2
3
0
2
1
2
1
1
3
2
, (2)
where v, v are the grid voltages; i, i are the load
currents in coordinates .
Instantaneous active p and reactive q powers are:
.
;
ivivq
ivivp
(3)
The DC component is extracted using a 4th-order
Butterworth LPF with 20 Hz cutoff. Reference
compensating currents are then computed as:
q
p
vv
vv
vvi
i
c
c
~
~1
22
, (4)
where p~ , q~ are the AC components of the instantaneous
active and reactive powers, respectively.
The reference compensating currents in the abc
frame can be determined by applying the inverse Clark
transformation:
c
c
cc
cb
ca
i
i
i
i
i
2321
2321
01
32 . (5)
Fig. 1. SAPF structure
Despite its widespread use, this approach suffers
from 2 fundamental limitations:
Slow transient response: the fixed LPF bandwidth
yields a 2–98 % rise time of the extracted DC component
of the instantaneous active power p is longer than 12 ms
when using the conventional 4th-order Butterworth LPF.
Poor robustness under non-ideal grids: raw voltages
are used without proper synchronization, transferring
negative-sequence components and harmonics directly
into the current references.
Proposed MVF-PLL-VLLMS control scheme.
The proposed control strategy (Fig. 2) eliminates both
limitations by integrating 2 complementary blocks:
An MVF-PLL that delivers clean positive-sequence
components normalized to unit amplitude. These
components are defined as: u = sin, u = cos, where
is the instantaneous phase of the fundamental grid
voltage. These signals represent the normalized
fundamental positive-sequence components of the grid
voltages in the αβ-frame, from which negative-sequence
components, harmonics and voltage unbalance have been
effectively removed, even under severe grid disturbances.
A single-coefficient VLLMS adaptive filter (x(k) = 1)
that replaces the conventional LPF for ultra-fast
extraction of the DC active power.
Fig. 2. Block diagram of the proposed control scheme
combining MVF-PLL and single-coefficient VLLMS
42 Electrical Engineering & Electromechanics, 2026, no. 4
Positive-sequence synchronization using MVF-
PLL. The MVF-PLL extracts the positive-sequence
fundamental component in the frame using the
continuous-time state equations [18, 19]:
,ˆˆ
;ˆˆ
xxxkx
xxxkx
c
c
(6)
where Txx ˆˆˆ x is the MVF-PLL state vector,
corresponding to the filtered output signal of x;
x = [x x]
T is the input electrical signal (current or voltage)
in the reference frame; k is the positive constant;
c = 250 rad/s is the nominal grid angular frequency;
x is the time derivative of the state vector x̂ .
After Tustin discretization at 20 kHz, the normalized
components are:
,
ˆ
;
ˆ
ˆ
22
22
xx
x
u
xx
x
u
(7)
where u, u are the normalized positive‑sequence unit
components, derived from the MVF‑PLL.
These components are perfectly synchronized with
the fundamental positive‑sequence component of the grid
voltage, free from negative‑sequence and harmonic
distortions. Figure 3 shows the architecture of the MVF-
PLL model used in the control algorithm.
Fig. 3. Architecture of the MVF-PLL model used in the control
algorithm
DC active-power extraction using VLLMS. The DC
component is extracted by modelling the problem as an
adaptive linear combiner with constant input signal x(k) = 1:
)()()()( kpkkky xw , (8)
where x(k) is the input signal, which serves as the
reference signal in the filtering process; w(k) is the single
adaptive weight [24]; y(k) is the output signal.
The objective is to adjust w(k) in order to minimize
the error:
)()()( kpkdke , (9)
where d(k) is the active power p.
The single adaptive weight w(k) is updated using the
VLLMS algorithm [20, 24]:
)()(2)()()(21)1( kekkkkk ww , (10)
where the time varying step size (k) and leakage factor
(k) are automatically adjusted according to [20]:
2)()()()1( kRkkk ; (11)
)1()()(2)()1( kwkekkk , (12)
where is the step size adaptation parameter; R(k) is the
autocorrelation of the error:
)1()(1)1()( kekekkR , (13)
where is the positive adaptation parameter controlling
the update of the leakage factor; is the exponential
weighting parameter.
To avoid possible divergence when the DC
component varies significantly, the step size (k) is
limited between min and max (parameters: = 0.97,
= 0.997, = 4.210–5, min = 510–5, max = 0.5).
The scheme (Fig. 4) shows adaptive linear filtering.
This structure requires only 5–6 arithmetic operations per
sample and achieves a 2–98 % rise time of 0.6–0.8 ms.
Fig. 4. Single-coefficient VLLMS adaptive filter used for DC
active-power extraction
Let ic
* and ic
* denote the reference compensating
currents in the frame. They are computed as:
u
u
p
i
i
i
i
c
c
*
*
. (14)
Subsequently, the reference currents in the abc
coordinate system are obtained through the inverse Clarke
transformation. Compared with the conventional method,
the proposed combination uses the clean components
normalized to unit amplitude (u, u) from the MVF-PLL
together with an adaptive filter without fixed bandwidth,
completely eliminating the classic speed-rejection trade-
off while ensuring excellent robustness.
Simulation and experiment. All simulations were
carried out in MATLAB/Simulink using the complete
3-phase SAPF model. Five representative operating
scenarios were considered in order to evaluate the behavior
of the proposed MVF-PLL combined with the single-
coefficient VLLMS algorithm. In each scenario, results are
directly compared with the conventional solution based on
a 4th-order Butterworth LPF tuned at 20 Hz.
Unless otherwise stated, each figure presents (from
top to bottom):
a) the 3-phase grid voltages vabc;
b) the phase A load current iLa;
c) the instantaneous active power p (gray), the
extracted DC component using the LPF LPFp (blue) and
using the proposed VLLMS VLLMSp (red);
d, e) the reference and compensated source currents
(blue with LPF, red with VLLMS).
These waveforms allow a direct visual comparison
of the convergence speed, tracking capability, harmonic
compensation performance and robustness under different
grid conditions.
Scenario 1: balanced sinusoidal grid with
constant nonlinear load. Figure 5 shows that the
proposed method extracts the DC component of the active
Electrical Engineering & Electromechanics, 2026, no. 4 43
power extremely rapidly. The VLLMS reaches its steady
value in approximately 0.65 ms (2–98 % rise time),
compared to about 12 ms for the LPF. This demonstrates
the intrinsic advantage of the adaptive estimator, which
reacts almost instantly to the stationary nonlinear load.
Scenario 2: balanced grid with sudden load
variation. The load power is doubled at t = 0.05 s and
restored to its nominal value at t = 0.1 s. The LPF exhibits
a clear delay after each load transition, whereas the
VLLMS adapts almost instantly and maintains accurate
tracking of the new power value as shown in Fig. 6. As a
consequence, the source current compensation remains
stable and free from transient distortions.
Scenario 3: unbalanced grid with constant load.
Under voltage unbalance, the instantaneous active power
contains oscillations that may degrade the performance of
conventional filtering (Fig. 7). The LPF attenuates these
oscillations but introduces a significant delay. By
contrast, the MVF-PLL ensures clean extraction of the
positive-sequence fundamental components, enabling the
VLLMS to operate with the same speed and accuracy as
in the balanced case.
Scenario 4: unbalanced grid with load steps. This
scenario confirms the robustness of the proposed system
under simultaneous disturbances: voltage unbalance and
abrupt variations of the load (Fig. 8). The VLLMS
maintains its rapid convergence, ensuring smooth
compensation even during large transitions.
t, s t, s
p
, W
i L
a,
A
v
ab
c,
A
i sa
-f
il
te
re
d,
A
i s
a-
re
f,
A
a
b
c e
d
Fig. 5. Scenario 1 – balanced grid with constant nonlinear load
t, s t, s
p
, W
i L
a,
A
v
ab
c,
A
i sa
-f
il
te
re
d,
A
i s
a-
re
f,
A
a
b
c e
d
Fig. 6. Scenario 2 – sudden load steps under balanced grid
t, s t, s
p
, W
i L
a,
A
v
ab
c,
A
i sa
-f
il
te
re
d,
A
i s
a-
re
f,
A
a
b
c e
d
Fig. 7. Scenario 3–10 % voltage unbalance with constant load
44 Electrical Engineering & Electromechanics, 2026, no. 4
t, s t, s
p
, W
i L
a,
A
v
ab
c,
A
i sa
-f
il
te
re
d,
A
i s
a-
re
f,
A
a
b
c e
d
Fig. 8. Scenario 4 – voltage unbalance with load steps at t = 0.1 s and t = 0.2 s
Scenario 5: severe grid distortion. Voltage
distortion is generated by inserting series resistors in phases
a and c between t = 0.1 s and t = 0.2 s (Fig. 9). This
produces approximately 20 % THDv (THD of the voltage).
Even under heavy distortion, the MVF-PLL successfully
isolates the clean positive-sequence components, enabling
the VLLMS to extract the DC component with sub-
millisecond response (Fig. 10). The LPF, on the other hand,
exhibits attenuation but poor reactivity.
Performance summary. The proposed method
consistently provides a 13–19 times improvement in
convergence speed with respect to the conventional LPF,
while maintaining comparable current THD after
compensation. Table 1 presents the system performance
under different grid voltage conditions.
Fig. 9. Circuit used to generate controlled voltage distortion in
phases A and C
t, s t, s
p
, W
i L
a,
A
v
ab
c,
A
i sa
-f
il
te
re
d,
A
i s
a-
re
f,
A
a
b
c e
d
Fig. 10. Scenario 5 – severe grid distortion (20 % THDv)
FPGA implementation and experimental
validation. The algorithm was deployed on a Xilinx
Spartan-6 XC6SLX75 FPGA. Hardware co-simulation
was first carried out through a Joint Test Action Group
(JTAG)-based verification setup.
Table 1
Performance comparison under different grid conditions
Grid condition Balanced Unbalanced Distorted
THD load iLa, % 27.8 25.1 38.66
THD source-LPF, % 1.65 1.72 4.46
THD source-VLLMS, % 1.76 2.45 4.92
Rise time-LPF, ms 12.0 12.0 10.5
Rise time-VLLMS, ms 0.65 0.78 0.62
Real-time validation was then performed on a 2.5
kVA laboratory prototype following the workflow
illustrated in Fig. 11. The corresponding experimental
schematic configuration is shown in Fig. 12.
Fig. 11. Flow diagram of real-time FPGA implementation
Experimental results under balanced grid and constant
load are given in Fig. 13. The proposed method reproduces
the fast convergence observed in simulations, resulting in
clean and sinusoidal compensated source currents.
Electrical Engineering & Electromechanics, 2026, no. 4 45
Fig. 12. Experimental schematic configuration
t, s i s
a-
fi
lt
er
ed
, A
i s
a-
re
f,
A
Fig. 13. Experimental results under balanced grid conditions
using the proposed method
Additional tests under unbalanced and distorted grids
are shown in Fig. 14, 15. In all cases, the measured rise
time of remained below 0.8 ms, confirming the robustness
and real-time suitability of the method.
t, s i s
a-
fi
lt
er
ed
, A
i s
a-
re
f,
A
Fig. 14. Experimental results under unbalanced grid conditions
using the proposed method
t, s
i s
a-
fi
lt
er
ed
, A
i s
a-
re
f,
A
Fig. 15. Experimental results under distorted grid conditions
using the proposed method
The real-time FPGA resource utilization of the
proposed method is summarized in Table 2. The
“Available” column gives the total resources of the device,
and the “Used” column indicates the number of primitives
consumed by the implementation. The low usage of look-
up tables (LUTs), registers (flip-flops), and digital signal
processing (DSP) resources confirms the computational
efficiency and real-time feasibility of the proposed method.
Table 2
Post-synthesis resource utilization of the proposed control
algorithm on Xilinx Spartan-6 XC6SLX75 FPGA
Resource Available Used
LUTs 46656 3867
Flip flops 93312 339
DSP 132 51
Conclusions. A novel SAPF control strategy
combining MVF-PLL with single-coefficient VLLMS
adaptive filtering has been proposed and rigorously
validated through detailed simulation and real-time FPGA
implementation.
The method completely eliminates the inherent
bandwidth speed trade-off of conventional LPFs, achieving
sub-millisecond transient response (0.6–0.8 ms rise time)
while keeping source-current THD well below 5 % even
under severe simultaneous voltage unbalance and harmonic
distortion fully compliant with IEEE 519 requirements.
Thanks to its extremely low computational
complexity, the proposed solution is ideally suited for
efficient fixed-point implementation on inexpensive
industrial FPGAs, making it highly attractive for next-
generation power quality improvement systems.
Conflict of interest. The authors declare that they
have no conflicts of interest.
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Received 28.01.2026
Accepted 11.03.2026
Published 02.07.2026
M.M. Belhadj Mostefa1, PhD Student,
A. Boussaid 1,2, Doctor of Electrical Engineering, Professor,
A. Khezzar1, Doctor of Electrical Engineering, Professor,
1 Laboratoire d’electrotechnique de Constantine (LEC),
University Freres Mentouri Constantine 1, Algeria,
e-mail: mohammed.belhadj-mostefa@lec-umc.org
(Corresponding Author)
2 Institute des Sciences et des Techniques Appliquees,
University Freres Mentouri Constantine 1, Algeria.
How to cite this article:
Belhadj Mostefa M.M., Boussaid A., Khezzar A. Shunt active power filter with variable leaky least mean squares and multivariable filter
phase-locked loop for fast harmonic compensation under non-ideal grid conditions. Electrical Engineering & Electromechanics, 2026,
no. 4, pp. 40-46. doi: https://doi.org/10.20998/2074-272X.2026.4.06
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| id | eiekhpieduua-article-353265 |
| institution | Electrical Engineering & Electromechanics |
| keywords_txt_mv | keywords |
| language | English |
| last_indexed | 2026-07-02T01:00:24Z |
| publishDate | 2026 |
| publisher | National Technical University "Kharkiv Polytechnic Institute" and Аnatolii Pidhornyi Institute of Power Machines and Systems of NAS of Ukraine |
| record_format | ojs |
| resource_txt_mv | eiekhpieduua/89/5600aa6c68a5d008ce249c9f215f0389.pdf |
| spelling | eiekhpieduua-article-3532652026-07-01T21:42:56Z Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions Belhadj Mostefa, M. M. Boussaid, A. Khezzar, A. shunt active power filter harmonic compensation adaptive filtering non-ideal grid power quality шунтуючий активний фільтр потужності компенсація гармонік адаптивна фільтрація неідеальна електромережа якість електроенергії Introduction. The widespread adoption of power-electronic loads has made harmonic distortion a critical power-quality issue. shunt active power filters (SAPFs) remain the most versatile solution. Problem. The conventional harmonic compensation algorithms suffer from degraded filtering performance under non-ideal grid condition, while the conventional low-pass filters (LPFs) in instantaneous reactive power theory (p-q theory) create an unavoidable trade-off between transient speed and harmonic rejection. Goal. To develop an adaptive and efficient harmonic current compensation algorithm that can generate reference currents with rapid convergence and high accuracy under non-ideal grid conditions. Methodology. The proposed method combines a multivariable filter phase-locked loop (MVF-PLL) for precise extraction of instantaneous components normalized to unit amplitude (i.e., sinq, cosq) with a variable leaky least mean squares (VLLMS) adaptive filter for DC component extraction. The algorithm was tested in MATLAB/Simulink across five scenarios, including balanced and unbalanced voltages, variable loads, and voltage distortions. Experimental validation was conducted on a field-programmable gate array (FPGA) using real-time co-simulation and hardware implementation. Results. MATLAB/Simulink simulations and real-time FPGA implementation on a low-cost Spartan-6 board show that the proposed method reduces the 2–98 % rise time of the extracted DC active power from ≈ 12 ms (4th-order Butterworth LPF) to 0.6– 0.8 ms (93–95 % improvement) while maintaining source current total harmonic distortion below 4.92 % in the worst case fully compliant with IEEE 519. The extremely low computational cost makes the solution ideal for industrial controllers. Scientific novelty. This paper proposes a novel control strategy that replaces the traditional LPF with a single-coefficient VLLMS adaptive filter while ensuring robust positive-sequence synchronisation via an MVF-PLL. Practical value. The algorithm improves SAPF performance, reduces response time, and ensures stable operation across diverse grid scenarios, offering a reliable solution for industrial applications. References 24, tables 2, figures 15. Вступ. Широке впровадження силових електронних навантажень зумовило перетворення гармонічних спотворень на одну з ключових проблем якості електроенергії. Шунтуючі активні силові фільтри (SAPFs) залишаються найбільш універсальним засобом її розв’язання. Проблема. Традиційні алгоритми компенсації гармонік характеризуються погіршенням ефективності фільтрації за неідеальних умов електричної мережі, тоді як класичні фільтри низьких частот (LPF), що застосовуються в теорії миттєвої реактивної потужності (p-q теорії), створюють компроміс між швидкодією перехідного процесу та ступенем пригнічення гармонік. Мета. Розроблення адаптивного та ефективного алгоритму компенсації гармонічних струмів, здатного формувати опорні струми з високою точністю та швидкою збіжністю за неідеальних умов мережі. Методика. Запропонований метод поєднує контур фазового автопідлаштування частоти на основі багатозмінного фільтра (MVF-PLL) для точного виділення миттєвих компонент, нормованих до одиничної амплітуди (sinθ, cosθ), з адаптивним фільтром Variable Leaky Least Mean Squares (VLLMS) для виділення постійної складової. Алгоритм досліджено в MATLAB/Simulink у п’яти режимах роботи, зокрема за симетричних та несиметричних напруг, змінного навантаження та спотворень напруги. Експериментальну перевірку виконано на програмованій вентильній матриці (FPGA) із використанням співмоделювання в реальному часі та апаратної реалізації. Результати. Моделювання в MATLAB/Simulink та реалізація в реальному часі на недорогій платі Spartan-6 FPGA показали, що запропонований метод зменшує час наростання (2–98 %) виділеної постійної складової активної потужності приблизно з 12 мс (LPF Баттерворта 4-го порядку) до 0,6–0,8 мс (покращення на 93–95 %) при одночасному забезпеченні коефіцієнта гармонічних спотворень струму мережі нижче 4,92 % у найгіршому випадку, що повністю відповідає вимогам стандарту IEEE 519. Надзвичайно низька обчислювальна складність робить запропоноване рішення придатним для промислових контролерів. Наукова новизна. У роботі запропоновано нову стратегію керування, у якій традиційний LPF замінено однокоефіцієнтним адаптивним фільтром VLLMS із забезпеченням робастної синхронізації за додатною послідовністю за допомогою MVF-PLL. Практична значимість. Запропонований алгоритм підвищує ефективність роботи SAPF, зменшує час реакції та забезпечує стабільне функціонування в різних режимах електричної мережі, що робить його надійним рішенням для промислових застосувань. Бібл. 24, табл. 2, рис. 15. National Technical University "Kharkiv Polytechnic Institute" and Аnatolii Pidhornyi Institute of Power Machines and Systems of NAS of Ukraine 2026-07-02 Article Article application/pdf https://eie.khpi.edu.ua/article/view/353265 10.20998/2074-272X.2026.4.06 Electrical Engineering & Electromechanics; No. 4 (2026); 40-46 Электротехника и Электромеханика; № 4 (2026); 40-46 Електротехніка і Електромеханіка; № 4 (2026); 40-46 2309-3404 2074-272X en https://eie.khpi.edu.ua/article/view/353265/351643 Copyright (c) 2026 M. M. Belhadj Mostefa, A. Boussaid, A. Khezzar http://creativecommons.org/licenses/by-nc/4.0 |
| spellingShingle | shunt active power filter harmonic compensation adaptive filtering non-ideal grid power quality Belhadj Mostefa, M. M. Boussaid, A. Khezzar, A. Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions |
| title | Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions |
| title_alt | Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions |
| title_full | Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions |
| title_fullStr | Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions |
| title_full_unstemmed | Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions |
| title_short | Shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions |
| title_sort | shunt active power filter with variable leaky least mean squares and multivariable filter phase-locked loop for fast harmonic compensation under non-ideal grid conditions |
| topic | shunt active power filter harmonic compensation adaptive filtering non-ideal grid power quality |
| topic_facet | shunt active power filter harmonic compensation adaptive filtering non-ideal grid power quality шунтуючий активний фільтр потужності компенсація гармонік адаптивна фільтрація неідеальна електромережа якість електроенергії |
| url | https://eie.khpi.edu.ua/article/view/353265 |
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