Low-power architecture for CIL-code hardware processor
In the article the authors present the architecture of a hardware CIL processor, which is capable to execute CIL instructions as native code. The CIL hardware engine is implemented on the top of the low-power DSP architecture, and the CIL processor has two execution cores: DSP and CIL. Such solution...
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| Datum: | 2005 |
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| Hauptverfasser: | , , |
| Format: | Artikel |
| Sprache: | Englisch |
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Інститут програмних систем НАН України
2005
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| Online Zugang: | https://nasplib.isofts.kiev.ua/handle/123456789/1372 |
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| Назва журналу: | Digital Library of Periodicals of National Academy of Sciences of Ukraine |
| Zitieren: | Low-power architecture for CIL-code hardware processor/ A. V. Chapyzhenka, D.V. Ragozin, A.L. Umnov // Проблеми програмування. — 2005. — N 4. — С. 20-38. — Бібліогр.: 16 назв. — англ. |
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Digital Library of Periodicals of National Academy of Sciences of Ukraine| _version_ | 1862656383741067264 |
|---|---|
| author | Chapyzhenka, A. Ragozin, D. Umnov, A. |
| author_facet | Chapyzhenka, A. Ragozin, D. Umnov, A. |
| citation_txt | Low-power architecture for CIL-code hardware processor/ A. V. Chapyzhenka, D.V. Ragozin, A.L. Umnov // Проблеми програмування. — 2005. — N 4. — С. 20-38. — Бібліогр.: 16 назв. — англ. |
| collection | DSpace DC |
| description | In the article the authors present the architecture of a hardware CIL processor, which is capable to execute CIL instructions as native code. The CIL hardware engine is implemented on the top of the low-power DSP architecture, and the CIL processor has two execution cores: DSP and CIL. Such solution allows to execute both CIL and DSP instruction sets as native instructions sets and gain performance in common multimedia tasks. Therefore, the DSP-based CIL processor may be targeted for multimedia digital home and even embedded applications. The research was sponsored by RFP 2 Microsoft Corp. grant.
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| first_indexed | 2025-12-02T04:21:42Z |
| format | Article |
| fulltext | |
| id | nasplib_isofts_kiev_ua-123456789-1372 |
| institution | Digital Library of Periodicals of National Academy of Sciences of Ukraine |
| issn | 1727-4907 |
| language | English |
| last_indexed | 2025-12-02T04:21:42Z |
| publishDate | 2005 |
| publisher | Інститут програмних систем НАН України |
| record_format | dspace |
| spelling | Chapyzhenka, A. Ragozin, D. Umnov, A. 2008-07-28T18:54:51Z 2008-07-28T18:54:51Z 2005 Low-power architecture for CIL-code hardware processor/ A. V. Chapyzhenka, D.V. Ragozin, A.L. Umnov // Проблеми програмування. — 2005. — N 4. — С. 20-38. — Бібліогр.: 16 назв. — англ. 1727-4907 https://nasplib.isofts.kiev.ua/handle/123456789/1372 004.273 In the article the authors present the architecture of a hardware CIL processor, which is capable to execute CIL instructions as native code. The CIL hardware engine is implemented on the top of the low-power DSP architecture, and the CIL processor has two execution cores: DSP and CIL. Such solution allows to execute both CIL and DSP instruction sets as native instructions sets and gain performance in common multimedia tasks. Therefore, the DSP-based CIL processor may be targeted for multimedia digital home and even embedded applications. The research was sponsored by RFP 2 Microsoft Corp. grant. en Інститут програмних систем НАН України Інструментальні засоби і середовища програмування Low-power architecture for CIL-code hardware processor Article published earlier |
| spellingShingle | Low-power architecture for CIL-code hardware processor Chapyzhenka, A. Ragozin, D. Umnov, A. Інструментальні засоби і середовища програмування |
| title | Low-power architecture for CIL-code hardware processor |
| title_full | Low-power architecture for CIL-code hardware processor |
| title_fullStr | Low-power architecture for CIL-code hardware processor |
| title_full_unstemmed | Low-power architecture for CIL-code hardware processor |
| title_short | Low-power architecture for CIL-code hardware processor |
| title_sort | low-power architecture for cil-code hardware processor |
| topic | Інструментальні засоби і середовища програмування |
| topic_facet | Інструментальні засоби і середовища програмування |
| url | https://nasplib.isofts.kiev.ua/handle/123456789/1372 |
| work_keys_str_mv | AT chapyzhenkaa lowpowerarchitectureforcilcodehardwareprocessor AT ragozind lowpowerarchitectureforcilcodehardwareprocessor AT umnova lowpowerarchitectureforcilcodehardwareprocessor |