ОПТОЕЛЕКТРОННИЙ СУМАТОР-ПОМНОЖУВАЧ ДЛЯ РЕАЛІЗАЦІЇ АЛГОРИТМУ DMAC
Mathematical model of the iterative process of solving systems of linear equations in which the input coefficient array is divided into machining hardware arrays bit partial sums and the corresponding bitwise shifts, which allows to calculate in parallel the operators of sum and shift. The architect...
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| Date: | 2017 |
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| Main Authors: | , , |
| Format: | Article |
| Language: | Russian |
| Published: |
Vinnytsia National Technical University
2017
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| Subjects: | |
| Online Access: | https://oeipt.vntu.edu.ua/index.php/oeipt/article/view/448 |
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| Journal Title: | Optoelectronic Information-Power Technologies |