Контролепригодная схема двоичного сумматора на основе 16-разрядной группы секций
A testable functional‑logical circuit of a binary adder based on a 16‑bit group of 4‑bit sections is considered. The design provides simultaneous carry propagation within each section and section group, and sequential carry propagation between groups. The circuit was developed within the concept of...
Saved in:
| Date: | 2003 |
|---|---|
| Main Author: | |
| Format: | Article |
| Language: | Ukrainian |
| Published: |
PE "Politekhperiodika", Book and Journal Publishers
2003
|
| Subjects: | |
| Online Access: | https://www.tkea.com.ua/index.php/journal/article/view/TKEA2003.1.21 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Journal Title: | Technology and design in electronic equipment |
| Download file: | |
Institution
Technology and design in electronic equipmentBe the first to leave a comment!