Архитектура устройств цифровой обработки сигналов с перестраиваемой структурой

Архитектура устройств цифровой обработки сигналов с перестраиваемой структурой

The synthesis technique is developed for the computing system architecture with tunable structure with graph of information connections (GIC) affine transformations which assumes additional equipment of initial computing system (CS) with the appropriate switching system implementing, depending on ch...

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Bibliographische Detailangaben
Datum:2011
1. Verfasser: Sheik-Seikin, A. N.
Format: Artikel
Sprache:Ukrainian
Veröffentlicht: PE "Politekhperiodika", Book and Journal Publishers 2011
Schlagworte:
аффинные преобразования
компенсатор боковых лепестков
граф информационных связей
ар­хи­тек­ту­ра вычислительной системы
вычислительный ресурс
коммутационный ресурс
Online Zugang:https://www.tkea.com.ua/index.php/journal/article/view/TKEA2011.4.10
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Назва журналу:Technology and design in electronic equipment

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Technology and design in electronic equipment
Beschreibung
Zusammenfassung:The synthesis technique is developed for the computing system architecture with tunable structure with graph of information connections (GIC) affine transformations which assumes additional equipment of initial computing system (CS) with the appropriate switching system implementing, depending on character of GIC change, one of the methods of block reorganization providing effective implementation of CS in wide range of GIC parameters change. The received estimations of hardware expenses for various methods of reorganization allow to define efficiency of CS implementation for each specific case.

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