Умножитель/делитель с повышенным быстродействием
An original structure of a multiplier/divider has been developed, in which at the first stage the hardware combines the operations of multiplication and subtraction of integers in two’s complement code, which increases the device’s performance. Moreover, in the proposed multiplier/divider device, th...
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| Datum: | 2009 |
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| 1. Verfasser: | |
| Format: | Artikel |
| Sprache: | Ukrainian |
| Veröffentlicht: |
PE "Politekhperiodika", Book and Journal Publishers
2009
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| Schlagworte: | |
| Online Zugang: | https://www.tkea.com.ua/index.php/journal/article/view/TKEA2009.3.16 |
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| Назва журналу: | Technology and design in electronic equipment |