Приборно-технологическое моделирование автоэмиссионных кремниевых микрокатодов
A structure of a system for converting topological information for digital lithography is proposed. A method for forming local three-dimensional SOI (Silicon-on-Insulator) structures has been developed, which makes it possible to create both planar and three-dimensional device elements and contacts....
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| Datum: | 2008 |
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| Hauptverfasser: | , , , , |
| Format: | Artikel |
| Sprache: | Ukrainisch |
| Veröffentlicht: |
PE "Politekhperiodika", Book and Journal Publishers
2008
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| Schlagworte: | |
| Online Zugang: | https://www.tkea.com.ua/index.php/journal/article/view/TKEA2008.5.43 |
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| Назва журналу: | Technology and design in electronic equipment |
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Technology and design in electronic equipment| Zusammenfassung: | A structure of a system for converting topological information for digital lithography is proposed. A method for forming local three-dimensional SOI (Silicon-on-Insulator) structures has been developed, which makes it possible to create both planar and three-dimensional device elements and contacts. On the SOI structures, a control high-voltage MOS transistor and a memory cell with a signal shaper for storing topological information have been designed. Expert optimization of the memory cell topology has made it possible to significantly reduce its area compared to that of a cell fabricated using standard n-channel MOS technology. |
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