Modified Wieght-Bits and Weight-Transitions Sum Codes for Discrete Device Synthesis with Error Detection
Gespeichert in:
| Datum: | 2019 |
|---|---|
| Hauptverfasser: | D. V. Efanov, V. V. Sapozhnikov |
| Format: | Artikel |
| Sprache: | English |
| Veröffentlicht: |
2019
|
| Schriftenreihe: | Electronic modeling |
| Online Zugang: | http://jnas.nbuv.gov.ua/article/UJRN-0000980537 |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Назва журналу: | Library portal of National Academy of Sciences of Ukraine | LibNAS |
Institution
Library portal of National Academy of Sciences of Ukraine | LibNASÄhnliche Einträge
-
Unit Bits and one Weighted Bit Sum Codes with Arbitrary Counting Modules
von: D. V. Efanov, et al.
Veröffentlicht: (2019) -
Modular-modified weighted summation codes detecting any errors of odd multiplicities
von: V. V. Sapozhnikov, et al.
Veröffentlicht: (2018) -
Research of properties of codes with summation with one weighted data bit in concurrent error detection systems
von: V. V. Sapozhnikov, et al.
Veröffentlicht: (2015) -
Organization of combinational circuits concurrent error detection systems based on the modified code with summation of weighted transitions
von: V. V. Sapozhnikov, et al.
Veröffentlicht: (2015) -
Organization of combinational circuits concurrent error detection systems based on the modified code with summation of weighted transitions
von: V. V. Sapozhnikov, et al.
Veröffentlicht: (2016)