T-satisfiability test problem for the VL1 logical language of the VRS system
In this paper we give a short introduction to the satisfiability modulo theories (SMT) problem and demonstrate how the methods developed in the SMT research field can be applied in the requirement verification tool VRS, which supports insertion modelling methodology. We formalize the logical languag...
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| Datum: | 2015 |
|---|---|
| 1. Verfasser: | |
| Format: | Artikel |
| Sprache: | Ukrainian |
| Veröffentlicht: |
PROBLEMS IN PROGRAMMING
2015
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| Online Zugang: | https://pp.isofts.kiev.ua/index.php/ojs1/article/view/78 |
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| Назва журналу: | Problems in programming |
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