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T-satisfiability test problem for the VL1 logical language of the VRS system

In this paper we give a short introduction to the satisfiability modulo theories (SMT) problem and demonstrate how the methods developed in the SMT research field can be applied in the requirement verification tool VRS, which supports insertion modelling methodology. We formalize the logical languag...

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Bibliographic Details
Date:	2015
Main Author:	Timofeev, V.G.
Format:	Article
Language:	Ukrainian
Published:	PROBLEMS IN PROGRAMMING 2015
Subjects:	UDC 004.02
Online Access:	https://pp.isofts.kiev.ua/index.php/ojs1/article/view/78
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Journal Title:	Problems in programming
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