Оценка технологического процесса изготовления СБИС по стабильности элементов ее структуры
The method of test circuits used in VLSI production is proposed to be supplemented with a technique for identifying time‑unstable elements of the physical structure of the product using a degradation process model. The possibility of conducting accelerated tests on structural elements is demonstrate...
Збережено в:
| Дата: | 2003 |
|---|---|
| Автори: | , |
| Формат: | Стаття |
| Мова: | Українська |
| Опубліковано: |
PE "Politekhperiodika", Book and Journal Publishers
2003
|
| Теми: | |
| Онлайн доступ: | https://www.tkea.com.ua/index.php/journal/article/view/TKEA2003.2.33 |
| Теги: |
Додати тег
Немає тегів, Будьте першим, хто поставить тег для цього запису!
|
| Назва журналу: | Technology and design in electronic equipment |
| Завантажити файл: |  |
Репозитарії
Technology and design in electronic equipment| Резюме: | The method of test circuits used in VLSI production is proposed to be supplemented with a technique for identifying time‑unstable elements of the physical structure of the product using a degradation process model. The possibility of conducting accelerated tests on structural elements is demonstrated. Experimental results are presented, showing the feasibility of detecting elements with time‑unstable characteristics at the stage of wafer production with VLSI chips. |
|---|