Оценка технологического процесса изготовления СБИС по стабильности элементов ее структуры
The method of test circuits used in VLSI production is proposed to be supplemented with a technique for identifying time‑unstable elements of the physical structure of the product using a degradation process model. The possibility of conducting accelerated tests on structural elements is demonstrate...
Saved in:
| Date: | 2003 |
|---|---|
| Main Authors: | , |
| Format: | Article |
| Language: | Ukrainian |
| Published: |
PE "Politekhperiodika", Book and Journal Publishers
2003
|
| Subjects: | |
| Online Access: | https://www.tkea.com.ua/index.php/journal/article/view/TKEA2003.2.33 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Journal Title: | Technology and design in electronic equipment |
| Download file: |  |
Institution
Technology and design in electronic equipment| Summary: | The method of test circuits used in VLSI production is proposed to be supplemented with a technique for identifying time‑unstable elements of the physical structure of the product using a degradation process model. The possibility of conducting accelerated tests on structural elements is demonstrated. Experimental results are presented, showing the feasibility of detecting elements with time‑unstable characteristics at the stage of wafer production with VLSI chips. |
|---|