Методы минимизации энергопотребления при проектировании КМОП БИС

The main methods that allow reducing the amount of dissipated power at the stages of CMOS VLSI design are presented. A classification of power dissipation sources is provided. Several practical measures for reducing energy losses and increasing the performance of CMOS microprocessors are discussed.

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Bibliographische Detailangaben
Datum:2008
Hauptverfasser: Belous, A. I., Murashko, I. A., Syakersky, V. S.
Format: Artikel
Sprache:Ukrainisch
Veröffentlicht: PE "Politekhperiodika", Book and Journal Publishers 2008
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Online Zugang:https://www.tkea.com.ua/index.php/journal/article/view/TKEA2008.2.39
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Назва журналу:Technology and design in electronic equipment

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Technology and design in electronic equipment